Many communication circuits require random delay generators to arbitrate collisions between competing information streams. For example, FIG. 1 is a schematic representation of an exemplary radio frequency identification (RFID) system. Computer 102 instructs interrogation source 104 to generate an interrogatory signal, which is broadcast via antenna 106 as interrogatory RF broadcast 109. RFID tags 110-1 and 110-2 each receive the interrogatory RF broadcast 109, and are energized thereby. Both tags may then attempt to broadcast a repetitive ID message (e.g., ID message 111-1 from tag 110-1 and ID message 111-2 from tag 110-2) simultaneously. Antenna 106 may receive messages 111-1 and 111-2 simultaneously, resulting in a collision between the ID broadcasts at detector 108. Thus, introducing a random delay in the ID broadcast of tag 110-1, tag 110-2, or both may effectively avoid such broadcast collisions.
FIG. 2 shows a schematic representation of an exemplary conventional RFID tag configured to generate a repetitive ID message upon receiving an interrogatory RF signal. An interrogatory RF signal 201 is received by antenna 202, and the RFID tag is powered by power-up circuit 204. An identification message stored in memory 212 is generated and transmitted to output stage 216, with a delay introduced in the transmission of the identification message from memory 212 to output stage 216 by a delay generating circuit 205 comprising clock 206, cyclic shift registers 208 and 210, and delay/reset circuitry 214. The delayed identification message is then transmitted by output stage 216 for broadcast by antenna 202. The amount of delay introduced by delay/reset circuit 214 between cyclic shift registers 208 and 210 may be selected so as to reduce the probability of collision between two or more RFID tags in an RFID system.
In some electronics applications, circuits and/or circuit elements may be implemented using thin-film transistor (TFT) technology. Such TFT-based circuits and/or circuit elements may be advantageous because of their low cost and broad applicability relative to conventional CMOS manufacturing processes. For example, TFT circuitry may be implemented on a variety of substrates (e.g., on flexible substrates, such as those comprising or consisting essentially of organic polymers or metallic foils) and may be fabricated using relatively economical methods (e.g., printing). However, the complexity of circuitry which may be based on TFT technology is typically limited due to economic and technical reasons. As a result, the number of transistors which may be available for implementing relatively complex circuit functions (e.g., conventional random delay generation circuits) is somewhat limited. Since random delay generation circuits (e.g., delay generating circuit 205 as shown in FIG. 2) are often critically important in minimizing collisions in communication systems, it would be technically and economically advantageous to implement a simple, TFT-based random delay generation circuit.